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40G QSFP+ to 8 X LC
  • 40G QSFP+ to 8 X LC
40G QSFP+ to 8 X LC
‐Brief /
‐Series/40G QSFP+ to 8X LC Cables
Description
Features

 

:         Full duplex 4 channel 850nm parallel active optical cable          

 

:         Transmission data rate up to 10.3Gbit/s per channel

 

:         SFF-8436 QSFP+ compliant

 

:         Hot pluggable electrical interface

 

:         Differential AC-coupled high speed data interface

 

:         4 channels 850nm VCSEL array

 

:         4 channels PIN photo detector array

 

:         Maximum link length of 300m on OM3 Multimode Fiber (MMF)and 400m on OM4 MMF

 

:         Low power consumption

 

:         Housing isolated from connector ground

 

:         Operating case temperature 0<C to +70<C

 

:         3.3V power supply voltage

 

:         RoHS 6 compliant

 

Applications

 

:         Infiniband transmission at 4ch SDR, DDR and QDR

 

:         40GBASE-SR4 40G Ethernet

 

:         Data Centers

 

Description

 

Powerlink QSFP+ to 8 x LC Connector Breakout Optical Cable are a high performance, low power consumption, long reach interconnect solution supporting 40G Ethernet, fiber channel and PCIe. It is compliant with the QSFP MSA and IEEE P802.3ba 40GBASE-SR4.

 

Powerlink QSFP+ Breakout Cable is an assembly of 4 full-duplex lanes, where each lane is capable of transmitting data at rates up to 10Gb/s, providing an aggregated rate of 40Gb/s.

 

QSFP+ Breakout Cable are suitable for short distances and offer a highly cost-effective way to connect within racks and across adjacent racks. These breakout cables connect to a 40G QSFP+ port of a switch on one end and to four 10G SFP+ Transceivers of a switch on the other end.

 

LPMode Pin

 

Powerlink QSFP AOC operate in the low power mode (less than 1.5 W power consumption)

 

This pin active high will decrease power consumption to less than 1W.

 

ModPrsL Pin

 

ModPrsL is pulled up to Vcc on the host board and grounded in the module. The ModPrsL is asserted ^Low ̄

 

when the module is inserted and deasserted ^High ̄ when the module is physically absent from the host connector.

 

IntL Pin

 

IntL is an output pin. When ^Low ̄, it indicates a possible module operational fault or a status critical to the

 

host system. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is

 

an open collector output and must be pulled up to Vcc on the host board.

 

 

DIAGNOSTIC MONITORING INTERFACE

 

Digital diagnostics monitoring function is available on all Powerlink QSFP AOCs. A 2-wire serial interface

 

provides user to contact with module.

 

The structure of the memory is shown in Figure 4. The memory space is arranged into a lower, single page, address space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in the lower page, such as Interrupt Flags and Monitors. Less time critical time entries, such as serial ID information and threshold settings, are available with the Page Select function.

 

The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a one-time-read for all data related to an interrupt situation. After an interrupt, IntL, has been asserted, the host can read out the flag field to determine the affected channel and type of flag.

 

 

Page02 is User EEPROM and its format decided by user.

 

The detail description of low memory and page00.page03 upper memory please see SFF-8436 document.

 

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